Semiconductor integrated circuits contain huge numbers of electronic devices such as diodes and transistors built onto a single crystal or chip, often made of silicon. Since these devices are so small, their operational integrity is very susceptible to imperfections or impurities in the crystal or introduced during fabrication. The failure of a single transistor in a circuit may render that circuit non-functional.
In order to circumvent this problem, the industry regularly builds redundant circuits on the same chip. Therefore, if a faulty circuit is discovered during testing, the faulty circuit can be disabled and its redundant circuit enabled. Often, this switching to a redundant circuit is accomplished by blowing certain fuses built into the circuitry of the chip. Those fuses signal the location of the defective element and enable a substitute element in a redundant circuit bank.
In the case of memory ICs, memory cells are usually arranged in rows and columns. Each memory cell is addressed by a particular row and column. By blowing the correct combination of fuses, circuitry which addresses the faulty element, such as a particular memory cell, a column or a row, is replaced with circuitry which addresses a corresponding redundant element.
When implementing redundancy schemes to salvage memory ICs containing defects, the limiting factor is often the number of defect-signaling fuses available for use. This is especially true when electrically blown fuses are used. Each fuse requires a probe pad large enough to connect an outside current source for blowing the fuse. By reducing the number of fuses needed, greater density and higher yields are possible.
Statistically, an impurity or imperfection causing the failure of a specific memory location is likely to affect the surrounding region in the crystal. Adjacent memory locations may have already gone bad, or their reliability has been seriously affected. Previously, the adjacent locations of dubious reliability would be tolerated or another set of fuses would be used to address another redundant memory location.
The usual set up for addressing one of 2**n possible memory locations for replacement involves a set of n fuses. The combination of blown and unblown fuses allows for 2**n possible states. Each state can represent one memory element, either cell, column or row, that is bad and must be replaced. It is also common practice to disregard the lower k significant bits of an address and use only n-k fuses. Each of the possible 2**(n-k) states can replace a set of 2**k elements.
Since memory circuit devices carry a limited number of redundant memory cells, typically configured as spare rows or columns, and the number of defect-signaling fuses must be limited, the reliability and yield of those circuits can be increased by judicious compromises.